1. Field of the Invention
The present invention relates to a flat panel display device and more particularly, to an organic electroluminescent display (ELD) device and manufacturing method for the same.
2. Discussion of the Related Art
Liquid crystal display (LCD) devices have been most widely used in the field of flat panel display devices because of their light weight and low power consumption. However, the liquid crystal display (LCD) device is not a light emitting element but rather a light receiving element that needs an additional light source to display images. Thus, a technical limit exists with regard to improving brightness, contrast ratio, viewing angle as well as enlarging a size of a liquid crystal display panel. For this reason, much research has been actively pursued in the field to develop a new flat panel display element that can overcome the aforementioned problems.
The organic electroluminescent display (ELD) device is one of the new flat panel display elements resulting from the research. Because the organic electroluminescent display (ELD) device emits light, the viewing angle and the contrast ratio is superior compared to the liquid crystal display (LCD) device. In addition, because the organic electroluminescent display (ELD) does not need a backlight as a light source, it has advantages, such as being light weight, having a small dimension, and having low power consumption. Moreover, the organic electroluminescent display (ELD) device can be driven with a low DC (direct current) and has a fast response time. Because the organic electroluminescent display (ELD) device uses a solid material instead of fluid material, such as liquid crystal, it is more stable under an external impact. Further, the organic electroluminescent display (ELD) has a wider range of temperature under which it can operate as compared to the liquid crystal display (LCD) device. The organic electroluminescent display (ELD) device also has an advantage in terms of production cost. More specifically, a deposition apparatus and an encapsulation apparatus are all that is needed for manufacturing the organic electroluminescent display (ELD) device while the liquid crystal display (LCD) device or Plasma display panels (PDPs) need many kinds of apparatus. The manufacturing process for the organic electroluminescent display (ELD) device is very simple compared to the liquid crystal display (LCD) device or the Plasma display panels (PDPs).
Organic electroluminescent display (ELD) devices may be classified into a passive matrix-type and an active matrix-type. In the case of the active matrix-type organic electroluminescent display (ELD) device, a voltage applied to the pixel is stored in a storage capacitor CSt and maintained until a signal for the next frame is applied. Accordingly, the pixel can retain the signal until the next frame regardless of the number of the scan lines. Because the active matrix-type organic electroluminescent display (ELD) device can obtain a desired luminance with low direct current (DC), the active matrix-type organic electroluminescent display (ELD) device has advantages, such as low power consumption and high resolution while having a large size.
A basic structure and an operational property of the active matrix-type organic electroluminescent display (ELD) device will be described hereinafter with reference to FIG. 1. FIG. 1 is a circuit diagram of a pixel of a related art active matrix organic electroluminescent display (ELD) device. In FIG. 1, a scan line 2 is formed in a first direction and signal and power supply lines 4 and 6 spaced apart from the scan line 2 are formed in a second direction. The scan line 2 and the signal and power supply lines 4 and 6 define a pixel region between them adjacent to where they cross each other. A switching thin film transistor TS, such as an addressing element, is formed near an intersection of the scan and signal lines 2 and 4, and a storage capacitor CST is connected to the switching thin film transistor TS. A driving thin film transistor TD, such as a current source element, is connected to the switching thin film transistor TS, the storage capacitor CST and the power supply line 6. The driving thin film transistor TD is electrically connected to an anode electrode and an organic electroluminescent diode E that is driven by a static current and is electrically connected between the anode electrode and a cathode electrode. The anode and cathode electrodes are components of the organic electroluminescent diode E. The switching thin film transistor TS serves to control a voltage and the storage capacitor CST serves to store charge. The driving operation of the related art organic electroluminescent display (ELD) device will be described hereinafter.
Once a gate of the switching thin film transistor TS is on, a data signal can be applied to the driving thin film transistor TD and the storage capacitor CST via the gate of the switching thin film transistor TS. If a gate of the driving thin film transistor TD is on, a current from the power supply line 6 can be applied to the organic electroluminescent diode E passing through the gate of the driving thin film transistor TD and thus the organic electroluminescent diode emits light. Because the degree of how much the gate of the driving thin film transistor TD is open depends on amplitude of the data signal, different gray levels can be displayed by controlling an amount of current that passes through the driving thin film transistor TD. A data signal, which also is stored in the storage capacitor CST, is continuously applied to the driving thin film transistor TD, and thus the organic electroluminescent diode E can continuously emit light until a signal for a next frame is applied.
FIG. 2 is a plan view of a pixel of a related art active matrix organic electroluminescent display (ELD) device. In FIG. 2, a switching thin film transistor TS and a driving thin film transistor TD are formed, for example. In FIG. 2, a gate line 37 is formed in a first direction and signal and power supply lines 51 and 41 spaced apart from the gate line 37 are formed in a second direction. The gate line 37 defines a pixel region E by crossing the data line 51 and the power supply line 41. A switching thin film transistor TS is formed near an intersection of the gate and the data lines 37 and 51. A driving thin film transistor TD is formed near an intersection of the switching thin film transistor TS and the power supply line 41. The power supply line 41 and a capacitor electrode 34 connected to a semiconductor layer 31 of the switching thin film transistor TS to form a storage capacitor CST. A first electrode 58 is electrically connected to the driving thin film transistor TD. Although not shown in FIG. 2, an organic light emitting layer and a second electrode sequentially formed over the first electrode 58. An area over which the first electrode 58 is formed is defined as an organic light-emitting region I. The driving thin film transistor TD has a semiconductor layer 32 and a gate electrode 38. The switching thin film transistor TS has a gate electrode 35. Laminated structures of the organic light-emitting region I, the driving thin film transistor TD and the storage capacitor CST will-be described hereinafter with reference to FIG. 3.
FIG. 3 is a cross-sectional view taken along a line III–III′ in FIG. 2. As shown in FIG. 3, a driving thin film transistor TD having a semiconductor layer 32, a gate electrode 38, and source and drain electrodes 50 and 52 are formed on an insulating substrate 1. A power electrode 42 extending from a power supply line (not shown) is electrically connected to the source electrode 50. A first electrode formed of transparent conductive material is electrically connected to the drain electrode 52. A capacitor electrode 34 is formed under the power electrode 42 and is of the same material as the semiconductor layer 32. The power electrode 42 and the capacitor electrode 34 form a storage capacitor CST. An organic light-emitting layer 64 and a cathode electrode 66 are sequentially formed on the first electrode 58 and thus form an organic light-emitting region I. First, second, third and fourth passivation layers 40, 44, 54 and 60 each respectively having a contact hole for electrical contacts in each layer are formed on the substrate 1. A buffer layer 30 is formed between the substrate 1 and the semiconductor layer 32. The first passivation layer 40 is formed between the storage electrode 34 and the power electrode 42 and serves as an insulating material. The second passivation layer 44 is formed on the power electrode 42 and the third passivation layer 54 is formed between the source electrode 50 and the first electrode 58. The fourth passivation layer 60 is formed between the driving thin film transistor TD and a second electrode 66.
FIGS. 4A to 4I are cross-sectional views illustrating a fabrication sequence of the related art active matrix organic electroluminescent display (ELD) device shown in FIG. 2. The laminated structures of the organic electroluminescent display (ELD) device may be formed by a photolithographic process in which the laminated structures are patterned by exposing and then developing a photoresist, such as a photo sensitive material. In FIG. 4A, a buffer layer 30 is formed on an insulating substrate 1 with a first insulating material. Then polycrystalline silicon active layer 32a and a polycrystalline silicon capacitor electrode 34 are formed on the buffer layer 30 with a first mask.
As shown in FIG. 4B, a gate insulating layer 36 and a gate electrode 38 are formed on the active layer 32a by sequentially depositing a second insulating material and a first metal material on the active layer 32a and then patterning the deposited material with a second mask. As shown in FIG. 4C, a first passivation layer 40 is formed over the whole substrate on which the gate insulating layer 36 and the gate electrode 38 are already formed. A power electrode 42 is subsequently formed on the first passivation layer 40 in space corresponding to the capacitor electrode 34 by depositing a second metal material on the first passivation layer 40 and then patterning it with a third mask.
As shown in FIG. 4D, a second passivation layer 44 having first and second ohmic contact layers 46a and 46b and a capacitor contact hole 48 is formed on the first passivation layer 40 by depositing a third insulating material on the first passivation layer 40 and then patterning it with a fourth mask. The first and second ohmic contact holes 46a and 46b expose portions at both sides of the active layer 32a and the capacitor contact hole 48 exposes a portion of the power electrode 42. A first portion of the active layer 32a is a drain region IIb and a second portion of the active layer 32a is a source region IIa. The source and drain regions IIa and IIb are for contacting the source and drain electrodes, respectively, that will be subsequently formed. The exposed first and second portions on both sides of the active layer 32a are doped by ions to form an ohmic contact layers 32b. The active layer 32a and the ohmic contact layers 32b form a semiconductor layer 32.
As shown in FIG. 4E, source and drain electrodes 50 and 52 are subsequently formed by depositing a third metal material on the substrate 1 on which the ohmic contact layers 32b are already formed and then patterning it with a fifth mask. The source electrode 50 is connected to the ohmic contact layer 32b in the source region IIa and the power electrode 42 respectively via the first ohmic contact hole 46a shown in FIG. 4D and the capacitor contact hole 48 in FIG. 4D. The drain electrode 52 is connected to the ohmic contact layer 32b in the drain region IIb via the second ohmic contact hole 46b in FIG. 4D. The semiconductor layer 32, the gate electrode 38 and the source and drain electrodes 50 and 52 form a driving thin film transistor TD. The power electrode 42 and the capacitor electrode 34 are electrically connected to the source electrode 52 and a semiconductor layer (not shown) of a switching thin film transistor (not shown), respectively, and form a storage capacitor CST using the first passivation layer 40 as an insulating body.
As shown in FIG. 4F, a third passivation layer 54 having a drain contact hole 56 is formed by depositing a fourth insulating material on the whole substrate 1 on which the source and drain electrodes 50 and 52 are already formed and then patterning it with a sixth mask. In FIG. 4G, a first electrode 58 connected to the drain electrode 52 via the drain contact hole 56 is formed on the third passivation layer 54 in space corresponding to an organic light-emitting region I by depositing a fourth metal material on the third passivation layer 54 and then patterning it with a seventh mask. As shown in FIG. 4H, a fourth passivation layer 60 having a first electrode exposure portion 62 exposing a first electrode portion corresponding to the organic light-emitting region I is formed by depositing a fifth insulating material on the whole substrate 1 over which the first electrode 58 is already formed and then patterning it with a eight mask. The fourth passivation layer 60 also serves to protect the driving thin film transistor TD from moisture and contaminants. The photolithographic mask process is completed as aforementioned.
As shown in FIG. 4I, an organic light-emitting layer 64 contacting the first electrode. 58 via the first electrode exposure portion 62 shown in FIG. 4H is formed on the substrate 1 on which the fourth passivation layer 60 is already formed. A second electrode 66 is subsequently formed on the organic light-emitting layer 64 and the fourth passivation layer 60 by depositing a fifth metal material on the whole substrate 1. If the first electrode 58 is used as an anode electrode, the fifth metal material must have a reflection property to reflect the light emitted from the organic light-emitting layer 64 to display an image. In addition, the fifth metal material is selected from the metal materials having a low work function so that the second electrode 66 can easily give away electrons.
FIG. 5 is a cross-sectional view of a related art organic electroluminescent display (ELD) device. In FIG. 5, a first substrate 70 on which a plurality of sub-pixels are defined and a second substrate 90 are spaced apart from each other. An array element layer 80 having a plurality of driving thin film transistors TD corresponding to each sub-pixel is formed on the first substrate 70. A plurality of first electrodes 72 corresponding to each sub-pixel is formed on the array element layer 80 and connected to the corresponding-driving thin film transistor TD of each sub-pixel. An organic light-emitting layer 74 for displaying red (R), green (G) and blue (B) colors in each sub-pixel is formed on the first electrode 72. A second electrode 76 is formed on the organic light-emitting layer 74. The first and second electrodes 72 and 76 and the organic light-emitting layer 74 form an organic electroluminescent diode E. Light emitted from the organic light-emitting layer 74 passes through the first electrode 72. That is, the organic electroluminescent display (ELD) device shown in FIG. 5 is a bottom emission-type organic electroluminescent display (ELD) device. The second substrate 90 is used as an encapsulating substrate and has a depressed portion 92 at a middle surface thereof and a moisture absorbent desiccant 94 for protecting the organic electroluminescent diode E from exterior moisture. The second substrate 94 is spaced a certain distance apart from the second electrode 76. A seal pattern 85 is formed on one of the first and second substrates 70 and 90 to attach the first and second substrates 70 and 90.
The related art bottom emission-type organic electroluminescent display (ELD) device is completed by attaching the substrate on which the array element layer and the organic electroluminescent diode are formed to an additional encapsulating substrate. If the array element layer and the organic electroluminescent diode are formed on the same substrate, then a yield of a panel having the array element layer and the organic electroluminescent diode is dependent upon the product of the individual yields of the array element layer and the organic electroluminescent diode. However, the yield of the panel is greatly affected by the yield of the organic electroluminescent diode. Accordingly, if an organic electroluminescent diode that is formed of a thin film usually having a thickness of 1000 Å has a defect due to impurities and contaminants, the panel is classified as an defective panel. This leads to wasted production costs and material, thereby decreasing the yield of the panel.
The bottom emission-type organic electroluminescent display (ELD) devices are advantageous because of their high image stability and easily configurable fabrication processing. However, the bottom emission-type organic electroluminescent display (ELD) devices are not adequate for implementation in devices that require high resolution due to aperture ratio limitations. In addition, since top emission-type organic electroluminescent display (ELD) devices emit light upward from the substrate, the light can be emitted without influencing the thin film transistor that is positioned under the light-emitting layer. Thus, design of the thin film transistor may be simplified. In addition, the aperture ratio is greater in top emission-type organic electroluminescent display (ELD) devices. However, since a cathode is commonly formed over the organic light-emitting layer in the top emission-type organic electroluminescent display (ELD) devices, material-selection and light transmittance are limited such that light transmission efficiency is lowered. If a thin film-type passivation layer is formed to prevent a reduction of the light transmittance, the thin film passivation layer may fail to prevent infiltration of exterior air into the device.